An insufficient DRAM address validation in PMFW may allow a privileged attacker to perform a DMA read from an invalid DRAM address to SRAM, potentially resulting in loss of data integrity.
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Score 5.2 from GitHub Security Advisory published 2024-08-13. NVD baseline CVSS 5.2; sources differ by 0.0.
An insufficient DRAM address validation in PMFW may allow a privileged attacker to perform a DMA read from an invalid DRAM address to SRAM, potentially resulting in loss of data integrity.
August 13, 2024
April 15, 2026
MITRE Common Weakness Enumeration — the root-cause categories this CVE belongs to.
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CWE-125